Riassunto analitico
In commercial-off-the-shelf (COTS) multi-core embedded systems virtualization is the mostly adopted solution in order to have mixed-critical setups with multiple Operating Systems (OS): one or more guests that are considered critical, e.g. a Real Time Operating System (RTOS), and others that are used for general computation. However, the predictability requested by such systems is constrained by the contention on shared resources in the memory hierarchy. In particular, a guest running in one processor core can delay the execution of another guest running in another core because they can access data in the same shared cache or in the same memory in DRAM (or both). Such memory interference effects have motivated the need to create isolation mechanisms for resources accessed by more than one task. This thesis proposes an implementation of page coloring, one of the possible isolation mechanism know in the literature. Starting from two known hypervisors, Xen and Jailhouse, the proposed algorithm is evaluated in multiple scenarios, both with synthetic workloads and real time industrial use cases. Given the increasing presence of embedded systems with x86 architecture, a brief part of analysis is performed on one x86 machine used for industrial automation. However, the main part of the evaluation is performed on Xilinx Ultrascale+ and Nvidia TegraX2, two arm based System-on-Chip (SoC).
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Abstract
In commercial-off-the-shelf (COTS) multi-core embedded systems virtualization is the mostly adopted solution in order to have mixed-critical setups with multiple Operating Systems (OS): one or more guests that are considered critical, e.g. a Real Time Operating System (RTOS), and others that are used for general computation.
However, the predictability requested by such systems is constrained by the contention on shared resources in the memory hierarchy.
In particular, a guest running in one processor core can delay the
execution of another guest running in another core because they can
access data in the same shared cache or in the same memory in DRAM (or both). Such memory interference effects have motivated the need to create isolation mechanisms for resources accessed by more than one task.
This thesis proposes an implementation of page coloring, one of the possible isolation mechanism know in the literature.
Starting from two known hypervisors, Xen and Jailhouse, the proposed algorithm is evaluated in multiple scenarios, both with synthetic workloads and real time industrial use cases.
Given the increasing presence of embedded systems with x86 architecture, a brief part of analysis is performed on one x86 machine used for industrial automation.
However, the main part of the evaluation is performed on Xilinx Ultrascale+ and Nvidia TegraX2, two arm based System-on-Chip (SoC).
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