Riassunto analitico
This study focuses on the design and optimization of power factor correction (PFC) circuits for on-board chargers (OBCs) in electric vehicles (EVs), with an emphasis on enhancing power density, efficiency, and reliability. The research investigates various PFC topologies, including conventional boost PFC, bridgeless boost PFC, interleaved boost PFC, and bidirectional converter architectures, aiming to minimize conduction and switching losses while maintaining compliance with international power quality standards.
A detailed design study was conducted to assess the performance of different PFC topologies under varying operational conditions. Wide-bandgap semiconductor devices, such as silicon carbide (SiC) and gallium nitride (GaN) transistors, were explored for their ability to reduce switching losses, improve thermal management, and enable high-frequency operation. The study also evaluates critical control strategies, including continuous conduction mode (CCM) and critical conduction mode (CrCM), to determine their impact on system efficiency, current ripple, and electromagnetic interference (EMI) mitigation.
Simulation models were developed in PLECS to evaluate the efficiency and performance of the dual-boost bridgless PFC circuit topology. Key performance metrics such as total harmonic distortion (THD), power factor (PF), and output voltage regulation were analyzed to determine optimal configurations for OBC integration. Additionally, loss estimation models and experimental validation were incorporated to verify theoretical predictions and ensure real-world applicability.
The results of this study demonstrate the feasibility of high-efficiency, high-power-density PFC circuits for EV OBCs. The proposed designs offer significant improvements in energy conversion efficiency, reducing the need for bulky passive components and enhancing the overall reliability of EV charging systems. These findings provide valuable insights for power electronics engineers, automotive manufacturers, and policymakers focused on advancing EV charging infrastructure and grid integration strategies.
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Abstract
Through the completion of this work, a guide to design a single-phase AFE for an EV OBC was completed. An investigation into the components which comprise the AFE were studied, including the boost PFC converter and EMI filter. A comparison between the various single-phase boost PFC topologies was performed, outlining the performance benefits and demerits related to each topology. The roles and significance of each component of the AFE was studied in detail, including the boost inductor, diodes, active switches, and output capacitor. A preliminary design study was completed on one of the most popular boost PFC converter topologies, a modified version of the bridgeless boost PFC, the dual-boost bridgeless boost PFC. The design of this circuit operating in CCM was performed, including creation of a target design specification, the design of the boost inductor, output capacitor, circuit diodes and MOSFETs. SiC MOSFETs and SiC Schottky diodes were identified for this application and used to perform a preliminary loss analysis. The designed circuit was implemented in power electronics software PLECS to simulate the functionality and performance of the designed converter. The designed converter met the performance targets set out in the design specification for the bridgeless boost PFC. The converter was able to provide stable DC output voltage from 400V up to 650 V at the load, and peak input current did not exceed 16Arms, respecting the limits for single-phase charging. The circuit achieved a power factor of 0.9963 at full load, and an estimated efficiency of approximately 98.1%. Also investigated, was the limitations of the base bridgeless boost PFC circuit, and the need for the inclusion of the dual-boost DC-DC pathways linking the AC source to ground. It was shown that without the AC source being connected to ground throughout the entire line cycle, the circuit was unable to be controlled and function correctly, verifying the drawbacks of the base bridgeless boost PFC circuit.
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