| Tipo di tesi | Tesi di laurea magistrale | ||||||||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Autore | GAMMAROTA, FRANCESCO | ||||||||||||||||||||||||||||||
| URN | etd-03202022-235311 | ||||||||||||||||||||||||||||||
| Titolo | Characterization of RTN in FD-SOI transistor | ||||||||||||||||||||||||||||||
| Titolo in inglese | Characterization of RTN in FD-SOI transistor | ||||||||||||||||||||||||||||||
| Struttura | Dipartimento di Ingegneria "Enzo Ferrari" | ||||||||||||||||||||||||||||||
| Corso di studi | ELECTRONICS ENGINEERING - Ingegneria Elettronica (D.M.270/04) | ||||||||||||||||||||||||||||||
| Commissione |
|
||||||||||||||||||||||||||||||
| Parole chiave |
|
||||||||||||||||||||||||||||||
| Data inizio appello | 2022-04-11 | ||||||||||||||||||||||||||||||
| Disponibilità | Accesso limitato: si può decidere quali file della tesi rendere accessibili. Disponibilità mixed (scegli questa opzione se vuoi rendere inaccessibili tutti i file della tesi o parte di essi) | ||||||||||||||||||||||||||||||
| Data di rilascio | 2062-04-11 | ||||||||||||||||||||||||||||||
Riassunto analitico
The project focuses on the study of transistors with FD-SOI technology to provide and corroborate information on their degradation when stress conditions are applied. The study analyzes the variation of the random telegraph noise (RTN) on the devices before and after that the constant voltage stress technique has been applied on them. The results of the fresh and stressed characterization of the devices are compared to know how the transistors vary after different stress tensions from the characteristic IG-VG, ID-VG and ID-VD. Exploiting the method of weighted time lag plot (W-TLP) it is possible to identify the relevant levels of RTN in which the devices work in fresh and stressed state. Thanks these analyses it will be possible to confirm that the effects of degradation in this technology provide an increase of the RTN in this technology. |
|||||||||||||||||||||||||||||||
Abstract
The project focuses on the study of transistors with FD-SOI technology to provide and corroborate information on their degradation when stress conditions are applied. The study analyzes the variation of the random telegraph noise (RTN) on the devices before and after that the constant voltage stress technique has been applied on them. The results of the fresh and stressed characterization of the devices are compared to know how the transistors vary after different stress tensions from the characteristic IG-VG, ID-VG and ID-VD. Exploiting the method of weighted time lag plot (W-TLP) it is possible to identify the relevant levels of RTN in which the devices work in fresh and stressed state. Thanks these analyses it will be possible to confirm that the effects of degradation in this technology provide an increase of the RTN in this technology. |
|||||||||||||||||||||||||||||||
| File |
|
||||||||||||||||||||||||||||||